engineering

The 350 nm process refers to the level of MOSFET semiconductor process technology that was reached around the 1993–1996 timeframe, by leading semiconductor companies like Sony, Intel and IBM.

Technology demonstrations

A MOSFET with a 300 nm channel length was fabricated by a research team led by K. Deguchi and Kazuhiko Komatsu at Nippon Telegraph and Telephone (NTT) in 1985.[1]

In 1989, an IBM research team led by Egyptian engineer Hussein I. Hanafi demonstrated a 300 nm CMOS transistor.[2]

Products featuring 350 nm manufacturing process

References

  1. Deguchi, K.; Komatsu, Kazuhiko; Miyake, M.; Namatsu, H.; Sekimoto, M.; Hirata, K. (1985). "Step-and-Repeat X-ray/Photo Hybrid Lithography for 0.3 μm Mos Devices". 1985 Symposium on VLSI Technology. Digest of Technical Papers: 74–75. ISBN 4-930813-09-3.
  2. Hanafi, Hussein I. (1989). "Submicron CMOS Circuit Simulation Model Accurate from Liquid Nitrogen to Room Temperature". In Heuberger, Anton (ed.). ESSDERC 89: Berlin, [Sept. 11 to 14, 1989]. Berlin Heidelberg New York, NY London Paris Tokyo Hong Kong: Springer. ISBN 978-0-387-51000-2.
  3. "Memory". STOL (Semiconductor Technology Online). Retrieved 25 June 2019.
  4. "Reality Co-Processor − The Power In Nintendo64" (PDF). Silicon Graphics. Retrieved 18 June 2019.
  5. "Propeller I semiconductor process technology? Is it 350nm or 180nm? - Parallax Forums". Forums.parallax.com. Archived from the original on 2012-07-10. Retrieved 2015-09-13.
Preceded by
600 nm
CMOS manufacturing processes Succeeded by
250 nm